Item 

Description 

Instruction Pointer (IPTR)  

Displays the Instruction Pointer (IPTR) address, opcode, operand (OPTR) address of the last floating-point instruction executed.  

FPU Registers pane 

Displays the floating-point register stack (ST0 through ST7) in ascending order. After the list, the control word, status word, and tag word are shown. The information displayed for each of the eight registers is shown as follows: Register name, register status, and register value.
The register status can be one of the following values:
Empty Indicates that the register contains invalid data. When a register is empty, no value is displayed for that register, because the data in the register is presumed to be invalid.
Valid Indicates that the register contains nonzero valid data.
Spec. (Special) Indicates that the register contains valid data, but the valid data represents a special condition, either NAN (not a number), infinity, or a denormalized value.
The status of each register is determined by examining the tag word and the eleventh through thirteenth bits of the status word (top of stack indicator). When a register’s status is not Empty, the value of the register in long double (extended) format is displayed immediately following the status. The registers can be displayed in different formats (other than long doubles).
The control, status, and tag words are displayed in hexadecimal format only. For these three words, any values that were altered by the last run operation are displayed in red.  

Control Flags pane 

Lists the control flags encoded in the control word. Any flags that were altered by the last run operation are displayed in red. The control flags and their bit number in the control word are as follows:
IM Invalid Operation Exception, 0
DM Denormalized Operation Exception Mask, 1
ZM Zero Divide Exception Mask, 2
OM Overflow Exception Mask, 3
UM Underflow Exception Mask, 4
PM Precision Exception Mask, 5
PC Precision Control, 8, 9
RC Rounding Control, 10, 11
IC Infinity Control (Obsolete), 12
Select any of the flags and right-click to change the flag’s value. For single-bit flags, it changes the value from 0 to 1 or from 1 to 0. For multi-bit flags, it cycles through all possible values.  

Status Flags pane 

Lists the status flags encoded in the status word. Any flags that were altered by the last run operation are displayed in red. The flags and their bit number in the control word are as follows:
IE Invalid Operation Exception, 0
DE Denormalized Operation Exception, 1
ZE Zero Divide Exception, 2
OE Overflow Exception, 3
UE Underflow Exception, 4
PE Precision Exception, 5
SF Stack Fault, 6
ES Error Summary Status, 7
C0 Condition Code 0 (CF), 8
C1 Condition Code 1, 9
C2 Condition Code 2 (PF), 10
ST Top of Stack, 11-13
C3 Condition Code 3 (ZF), 14
BF FPU Busy, 15
Select any of the flags and right-click to change the flag’s value. For single-bit flags, it changes the value from 0 to 1 or from 1 to 0. For multi-bit flags, it cycles through all possible values.  

SSE pane 

Displays the Streaming SIMD Extensions (SSE) registers.
Right-click the SSE pane and choose Display As to change the display format of the register content.